| Processor | Architecture | Instruction Set | Memory Features |
| ARM720T |
ARMv4T |
ARM, Thumb |
8k unified cache, MMU |
| ARM7TDMI-S |
ARMv4T |
ARM, Thumb |
|
| ARM920T |
ARMv4T |
ARM, Thumb |
16K/16K cache |
| ARM922T |
ARMv4T |
ARM, Thumb |
8K/8K cache |
| ARM946E-S |
ARMv5TE |
ARM, Thumb, DSP |
0 to 1MB cache, 0 to 1MB TCM, MPU |
| ARM966E-S |
ARMv5TE |
ARM, Thumb, DSP |
0 to 64MB TCM |
| ARM968E-S |
ARMv5TE |
ARM, Thumb, DSP |
0 to 4MB TCM |
| ARM7EJ-S |
ARMv5TEJ |
ARM, Thumb, DSP |
|
| ARM926EJ-S |
ARMv5TEJ |
ARM, Thumb, DSP |
4k-128k cache, 0 to 1MB TCM, MMU |
| ARM1136J(F)-S |
ARMv6K |
ARM, Thumb, DSP, SIMD |
4k-64k cache, 0 to 64K TCM |
| Cortex-M0 |
ARMv6-M |
Thumb |
|
| Cortex-M1 |
ARMv6-M |
Thumb |
0 to 1MB TCM |
| Cortex-M3 |
ARMv7-M |
Thumb, Thumb2 |
|
| Cortex-R4 |
ARMv7-R |
ARM, Thumb2, DSP, SIMD |
4k-64k cache, 0 to 8MB TCM, MPU |
| Cortex-M4 |
ARMv7E-M |
Thumb, Thumb2, DSP, SIMD |
|