ARM922T
The ARM920T and ARM922T 32-bit processors are based on ARMv4T architecture and the ARM9TDMI core, supporting both 16-bit Thumb code as well as 32-bit ARM code. The Thumb instruction code provides high code density while maintaining good performance, whereas the 32-bit ARM instruction code delivers higher performance or when special system features like co-processor access is needed. The ARM9TDMI, the ARM920T and the ARM922T processors have five stage pipelines, use Harvard architecture (separate instruction and data interface), and provide a high operating frequency in most semiconductor technology processes. The ARM9TDMI processor contains only the processor core. Due to the nature of the interface design, it is unusual for the ARM9TDMI processor to be used by itself. Usually microcontrollers based on the ARM9TDMI processor are using the ARM920T processor or the ARM922T processor, which contains the ARM9TDMI processor core, an MMU, instruction cache and data cache. The ARM920T processor features 16k cache units, while the ARM922T processor features 8k cache units. Both the ARM920T and the ARM922T processors support OS like Windows CE, Linux and Symbian OS.
| Core Overview | |
|---|---|
| Family | ARM9 |
| Architecture | ARMv4T |
| Product Line | Application |
| Pipeline Stages | 5 |
| Instruction Sets | |
| ARM Instructions |  |
| Thumb Instructions | |
| Thumb2 Instructions |  |
| DSP Instructions | |
| SIMD Instructions | |
| Memory Interface | |
| Cache 8K/8K | |
| TCM | |
| MMU | |
| MPU | |
| Debug Interface | |
| ETM9, Embedded ICE | |