CMSIS Version 1.00

The Cortex Microcontroller Software Interface Standard (CMSIS) answers the challenges that are faced when software components are deployed to physical microcontroller devices based on a Cortex-M1 or Cortex-M3 processor. The CMSIS will be also expanded to future Cortex-M processor cores (the term Cortex-Mx is used to indicate that). The CMSIS is defined in close co-operation with various silicon and software vendors and provides a common approach to interface to peripherals, real-time operating systems, and middleware components.

ARM provides as part of the CMSIS the following software layers that are available for various compiler implementations:

• Core Peripheral Access Layer: contains name definitions, address definitions and helper functions to access core registers and peripherals. It defines also an device independent interface for RTOS Kernels that includes debug channel definitions.
• Middleware Access Layer: provides common methods to access peripherals for the software industry. The Middleware Access Layer is adapted by the Silicon Vendor for the device specific peripherals used by middleware components. The middleware access layer is currently in development and not yet part of this release.

These software layers are expanded by Silicon partners with:

• Device Peripheral Access Layer: provides definitions for all device peripherals
• Access Functions for Peripherals (optional): provides additional helper functions for peripherals

CMSIS defines for a Cortex-M3 Microcontroller System:

• A common way to access peripheral registers and a common way to define exception vectors.
• The register names of the Core Peripherals and the names of the Core Exception Vectors.
• An device independent interface for RTOS Kernels including a debug channel.
• Interfaces for middleware components (TCP/IP Stack, Flash File System).

By using CMSIS compliant software components, the user can easier re-use template code. CMSIS is intended to enable the combination of software components from multiple middleware vendors.