MCBSTR9: RUNNING AT 96MHZ
Information in this article applies to:
Using the Keil BLINKY example for the MCBSTR9 board, everything runs OK at 24MHz, but when I change the PLL post-divider value (PLL_PDIV) from 3 to 2 in the STARTUP.S file to run at 96MHz, then download and run, the program does not run (no LEDs blink). What's wrong?
When you set the PLL post-divider value (PLL_PDIV) to 2, you must change the Clock Control Register (SCU_CLKCNTR) to the following:
This applies to earlier silicon revisions of STR91x which had a problem with System reset at 96MHz and it was not possible to use a 96MHz clock for FMI (see http://www.st.com/stonline/products/literature/es/12280.pdf page 12). This was fixed in STR91x Rev D with date code 618 and later and in STR91xFA.
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Last Reviewed: Wednesday, April 16, 2008
of your data.